Flash memory is widely used in storing digital data nowadays. It has many aspects of applications: flash memory chips can be aggregated to form a SSD (Solid State Disk) to be a key part of a notebook, or a pendrive as a portable storage device; one single flash memory chip may be packaged to form a micro SD card inserted in a smartphone for recording data. Take SSD as an example. Comparing with HDD (Hard Disk Drive), SSD has advantages of shockproof, compact size, low heat radiation and fast speed of read and write. Although HDD has higher bit-to-cost ratio than SSD, the distance therebetween is getting closer. SSD is replacing HDD to be the mainstream in storage.
Conventionally, storing data into SSD follows the following steps: sending data to a DRAM module, programming the data to the SSD, and removing the data in the DRAM module if the programming is successful. Sometimes, due to physical damage of flash memory cell or noise in the storing channel, program may fail. The host requesting storing data may not be informed the failed accident and process programming data again. This leads to data lost. Therefore, a method for safely programming data into SSD or other similar storage devices with flash memory chips is an important issue.
A conventional method for settle the issue is to apply RAID (Redundant Array of Independent Disks) 5 algorithm. RAID 5 is a solution covering storage efficiency, data safety and cost. It uses disk striping technology and needs at least 3 disks. RAID 5 is not to back up the stored data to have a duplicate but to store the data and corresponding parity in separate disks forming a system of RAID 5. If one disk is out of order, the data stored in that disk can be recovered by other parts of the data in other disks with the parity. The application of RAID 5 algorithm is just take the flash memory chip as the disk and process similar data allocation. Of course, concerning data safety, algorithm of RAID 6 or more advanced RAID level may be applied. Although the method has safe programming ability, a defect is that more flash memory chips are required to be used for storing parities. It is a kind of waste of resources.
Another solution is provided by the US Patent Application No. 20150355858. A method in said patent application includes storing data encoded with an Error Correction Code (ECC) in analog memory cells, by buffering the data in a volatile buffer and then writing the buffered data to the analog memory cells while overwriting at least some of the data in the volatile buffer with success indications. Upon detecting a failure in writing the buffered data to the analog memory cells, recovered data is produced by reading both the volatile buffer and the analog memory cells, assigning reliability metrics to respective bits of the recovered data depending on whether the bits were read from the volatile buffer or from the analog memory cells, and applying ECC decoding to the recovered data using the reliability metrics. Thus, the recovered data is re-programmed.
Said patent application provides a concrete and feasible solution to avoid program fail. However, there are some shortcomings. First, a volatile buffer is needed to temporarily store data (may include corresponding parity) in the analog memory cells (referring to flash memory cells). The availability and size of volatile buffer for the applied flash memory chip will influence the performance of data recovery. Secondly, according to the description of said patent application, a controller for carrying out the provided method should have a RAM (Random Access Memory) to buffer all write data as conventional the programming procedure does. Workload of the RAM is large and size of the RAM can not be reduced.
From the description above, an improved method for recovering data in event of a program failure and related controller and storage system are still desired.